Description

This subject constitutes a first approach to the knowledge and design of the digital circuits, the hardware that allows to execute the vast majority of information technology applications required by the BTTE degree. Therefore, the aim of the subject is to provide some background that every graduate must know.

First, it focuses on the basic elements that make up the different digital circuits and their graphic representation. It then analyzes commonly used combinational and sequential circuits, their diagrams, logical symbols, and the hardware-based design languages (HDL) that utilize the so-called top-down methodology, that is, from high-level description to synthesis, which leads to the system physical implementation.

Requirements

Subjects recommended to be taken simultaneously

• Physics: Fundamentals of Electronics (V05G301V01201)

Subjects recommended to have taken before

• Informatics: Computer Architecture (V05G301V01109)

Instructors

• Moure Rodríguez, María José
• Pérez López, Serafín Alfonso

Contents

Unit 0: Summary

• Teaching Staff
• Identifying Data
• Lecture sessions
• Laboratory Sessions
• Planning
• Assessment
• Lecture Scheduling
• Laboratory Scheduling
• Bibliography

Unit 1: Introduction to Digital Electronics

• Introduction
• Number Systems and Digital Codes
• Boolean Algebra
• Truth tables
• Logic Gates
• Logic Circuits
• Simplifying logic functions
• Combinational Systems Design with Logic Gates

Unit 2: Introduction to VHDL

• Relevant Language Elements and Concepts for this Course

Unit 3: Basic Combinational Systems (I)

• Functional Blocks
• Technologies and Output Types of Digital Circuits
• Decoders

Unit 4: Basic Combinational Systems (II)

• Multiplexers
• Encoders
• Demultiplexers
• Programmable Memories or Look-Up Tables (LUT)

Unit 5: Arithmetic Systems

• Comparators
• Parity Detection and Generation
• Arithmetic Circuits
• Application Examples

Unit 6: Sequential Logic Systems Principles

• Definition and Classification
• Latches and Flip-Flops
• Application Examples

Unit 7: Synchronous Sequential Systems

• Registers
• Counters
• Shift Registers
• Application Examples

Unit 8: Control Synchronous Sequential Logic Design

• Control Synchronous Sequential Systems Design
• Application Examples

Unit 9: Memory Units

• Classification
• Active and Passive Random Access Memories (RAM and ROM)
• Content Access Memories (CAM)
• Sequential Access Memories (LIFO, FIFO, Circular)

Practices

Practice 1

• Introduction to Design using VHDL and the Vivado Design Tool (I)

Practice 2

• Introduction to Design using VHDL and the Vivado Design Tool (II)

Practice 3

• Combinational System Design and Implementation (I)

Practice 4

• Combinational System Design and Implementation (II)

Practice 5

• Combinational System Design and Implementation (III)

Practice 6

• Combinational System Design and Implementation (IV)

Practice 7

• Arithmetic Circuits

Practice 8

• Arithmetic Systems

Practice 9

• Sequential Circuits

Practice 10

• Sequential Systems (I)

Practice 11

• Sequential Systems (II)

Practice 12

• Sequential Systems (III)

Learning Outcomes

B13

• CG13: The ability to use software tools that support problem solving in engineering

B14

• CG14: The ability to use software tools to search for information or bibliographical resources

C14

• CE14 / T9: The ability to:
  • Analyze and design combinational and sequential circuits
  • Work with synchronous and asynchronous systems
  • Use integrated circuits and microprocessors

C15

• CE15 / T10: Knowledge and application of:
  • Fundamentals of hardware description languages

Recommended Readings and Tools

Subjects that continue the syllabus

• Programmable Electronic Circuits (V05G301V01302)

Planned Activities

Introductory activities

• Subject presentation
• Presentation of:
  • Laboratory sessions
  • Instrumentation
  • Software resources to be used

Lecturing

• Explanation of main contents by the lecturer in class
• Students must:
  • Use the proposed bibliography
  • Carry out self-study
  • Acquire knowledge and skills related to the subject
• Lecturer support:
  • Answers questions in class or office
• Skills developed:
  • C14, C15 (“know”)

Laboratory practical

• Activities to apply main concepts and definitions
• Students will:
  • Learn to use laboratory instrumentation
  • Use software tools and components
  • Construct and test electronic circuits
  • Develop autonomous learning and teamwork skills
• Support:
  • Questions answered in lab sessions or office
• Skills developed:
  • C15, B13, B14 (“know how”)
• Software used:
  • VIVADO (Xilinx)

Problem solving

• Activities to apply concepts to problems and exercises
• Includes:
  • Problems explained by lecturer
  • Take-home problem sets for students
• Support:
  • Questions answered in class or office
• Skills developed:
  • C14, B15 (“know how”)

Assessment Methods and Criteria

Evaluation Activities

Laboratory practical

• Description:
  The lecturer will check the level of compliance of the students with the goals related to laboratory skills.
  • Final mark of laboratory (FML) is assessed on a 10-point scale
  • Evaluation includes:
    • Group work (same mark for each member)
    • Individual answers to personalized questions (individual mark)
• Qualification: 30
• Training and Learning Results:
  • B13
  • B14
  • C15

Problem and/or exercise solving

• Description:
  The lecturer will check students' skills to solve exercises and troubleshooting
  • Marks for each test assessed on a 10-point scale
  • Final mark of theory (FMT) assessed on a 10-point scale
• Qualification: 70
• Training and Learning Results:
  • C14
  • C15

Other Comments on the Evaluation

1. Continuous assessment in ordinary opportunity

• Continuous assessment system is provided according to degree guidelines
• Students choosing global assessment must notify the coordinator within one month
• Assessment consists of:
  • Theory
  • Laboratory (hands-on learning)
• Grades are valid only for the current academic year

1.a. Theory

• Midterm Assessment Test (MAT):
  • Conducted during the semester
  • Date set by Academic Committee (CAG)
  • Graded from 0 to 10
  • If MAT < 4 → counted as 0
  • Absence without justification → 0
• Final Assessment Test (FAT):
  • Held at end of course
  • Graded from 0 to 10
  • Absence without justification → 0
• Format of tests:
  • Short-answer questions
  • Problem-solving exercises

1.b. Laboratory

• 12 laboratory sessions (2 hours each), usually in pairs
• Sessions 1–4:
  • Guided sessions
  • Mandatory but not graded
• Sessions 5, 7, 10:
  • Mandatory but not graded
• Sessions 6, 8, 9, 11, 12:
  • Mandatory and graded
• Each session:
  • Graded from 0 to 10 (LG)
  • Based on:
    • Preparation work
    • Laboratory performance
    • Behaviour
• Absence without justification → 0
• Global Laboratory Grade (GLG):
  • GLG = (LG6 + LG8 + LG9 + LG11 + LG12) / 5
  • If GLG < 3 → GLG = 0
  • Missing more than 2 sessions → GLG = 0

1.c. Call's assessment

• Continuous Grade (CGA):
  • CGA = 0.3 GLG + 0.3 MAT + 0.4 FAT
• Condition:
  • If FAT < 4 → CGA = FAT

2. Global assessment in ordinary opportunity

• Students must take:
  • GAT (theory test)
  • GLA (laboratory test)
• Both graded from 0 to 10
• Final grade:
  • GA = 0.5 GAT + 0.5 GLA

3. Continuous assessment in extraordinary opportunity

• Laboratory grade (GLG) is kept
• Students take:
  • EAT (exam covering all contents)
• Final grade:
  • EGA = 0.3 GLG + 0.7 EAT

4. Global assessment in extraordinary opportunity

• Students must take:
  • EGAT (theory)
  • EGLT (laboratory)
• Both graded from 0 to 10
• Final grade:
  • EGA = 0.5 EGAT + 0.5 EGLT

5. Assessment of the final degree call

• Students must take:
  • FDTT (theory)
  • FDLT (laboratory)
• Both graded from 0 to 10
• Final grade:
  • FDG = 0.5 FDTT + 0.5 FDLT